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hm6216255hc series 4m high speed sram (256-kword 16-bit) ade-203-1196b (z) rev. 1.0 nov. 30, 2001 description the hm6216255hc series is a 4-mbit high speed static ram organized 256-k word 16-bit. it has realized high speed access time by employing cmos process (6-transistor memory cell) and high speed circuit designing technology. it is most appropriate for the application which requires high speed, high density memory and wide bit width configuration, such as cache and buffer memory in system. it is packaged in 400-mil 44-pin plastic soj and 400-mil 44-pin plastic tsopii. features ? single 5.0 v supply : 5.0 v 10 % ? access time: 10 ns (max) ? completely static memory ? no clock or timing strobe required ? equal access and cycle times ? directly ttl compatible ? all inputs and outputs ? operating current: 170 ma (max) ? ttl standby current: 40 ma (max) ? cmos standby current: 5 ma (max) : 1.2 ma (max) (l-version) ? data retention current: 0.8 ma (max) (l-version) ? data retention voltage: 2 v (min) (l-version) ? center v cc and v ss type pin out
hm6216255hc series rev. 1, nov. 2001, page 2 of 17 ordering information type no. access time device marking package hm6216255hcjp-10 10 ns hm6216255cjp10 400-mil 44-pin plastic soj (cp-44d) hm6216255hcljp-10 10 ns hm6216255cljp10 hm6216255hctt-10 10 ns hm6216255ctt10 400-mil 44-pin plastic tsopii (ttp-44de) hm6216255hcltt-10 10 ns hm6216255cltt10
hm6216255hc series rev. 1, nov. 2001, page 3 of 17 pin arrangement a0 a1 a2 a3 a4 i/o1 i/o2 i/o3 i/o4 v cc v ss i/o5 i/o6 i/o7 i/o8 a5 a6 a7 a8 a9 (top view) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 a17 a16 a15 i/o16 i/o15 i/o14 i/o13 v ss v cc i/o12 i/o11 i/o10 i/o9 nc a14 a13 a12 a11 a10 44-pin soj 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 a0 a1 a2 a3 a4 i/o1 i/o2 i/o3 i/o4 v cc v ss i/o5 i/o6 i/o7 i/o8 a5 a6 a7 a8 a9 a17 a16 a15 i/o16 i/o15 i/o14 i/o13 v ss v cc i/o12 i/o11 i/o10 i/o9 nc a14 a13 a12 a11 a10 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 44-pin tsop (top view) pin description pin name function a0 to a17 address input i/o1 to i/o16 data input/output cs chip select oe output enable we write enable ub upper byte select lb lower byte select v cc power supply v ss ground nc no connection
hm6216255hc series rev. 1, nov. 2001, page 4 of 17 block diagram 1024-row 32-column 8-block 16-bit (4,194,304 bits) cs v cc v ss a8 a9 a17 a15 a16 a0 a2 a4 column i/o column decoder i/o1 we input data control row decoder oe cs cs cs lb ub i/o16 i/o9 i/o8 . . . . . . a14 a13 a12 a5 a6 a7 a11 a10 a3 a1 (lsb) (msb) internal voltage generator (lsb) (msb)
hm6216255hc series rev. 1, nov. 2001, page 5 of 17 operation table cs cs cs cs oe oe oe oe we we we we lb lb lb lb ub ub ub ub mode v cc current i/o1?i/o8 i/o9?i/o16 ref. cycle h standby i sb , i sb1 high-z high-z ? lhh output disable i cc high-z high-z ? l lhllread i cc output output read cycle l l h l h lower byte read i cc output high-z read cycle l l h h l upper byte read i cc high-z output read cycle l l hhh? i cc high-z high-z ? l lllwrite i cc input input write cycle l l l h lower byte write i cc input high-z write cycle l l h l upper byte write i cc high-z input write cycle l l hh? i cc high-z high-z ? note: h: v ih , l: v il , : v ih or v il absolute maximum ratings parameter symbol value unit supply voltage relative to v ss v cc ?0.5 to +7.0 v voltage on any pin relative to v ss v t ?0.5* 1 to v cc + 0.5* 2 v power dissipation p t 1.0 w operating temperature topr 0 to +70 c storage temperature tstg ?55 to +125 c storage temperature under bias tbias ?10 to +85 c notes: 1. v t (min) = ?2.0 v for pulse width (under shoot) 6 ns. 2. v t (max) = v cc + 2.0 v for pulse width (over shoot) 6 ns.
hm6216255hc series rev. 1, nov. 2001, page 6 of 17 recommended dc operating conditions (ta = 0 to +70c) parameter symbol min typ max unit supply voltage v cc * 3 4.5 5.0 5.5 v v ss * 4 000v input voltage v ih 2.2 ? v cc + 0.5* 2 v v il ?0.5* 1 ?0.8v notes: 1. v il (min) = ?2.0 v for pulse width (under shoot) 6 ns. 2. v ih (max) = v cc + 2.0 v for pulse width (over shoot) 6 ns. 3. the supply voltage with all v cc pins must be on the same level. 4. the supply voltage with all v ss pins must be on the same level. dc characteristics (ta = 0 to +70c, v cc = 5.0 v 10 %, v ss = 0 v) parameter symbol min typ* 1 max unit test conditions input leakage current |i li | ? ? 2 a vin = v ss to v cc output leakage current* 1 |i lo | ? ? 2 a vin = v ss to v cc operating power supply current i cc ? ? 170 ma cs = v il , iout = 0 ma other inputs = v ih /v il standby power supply current i sb ??40ma cs = v ih , other inputs = v ih /v il i sb1 ?2.55 mav cc cs v cc ? 0.2 v, (1) 0 v vin 0.2 v or (2) v cc vin v cc ? 0.2 v ?* 2 0.6* 2 1.2* 2 output voltage v ol ??0.4vi ol = 8 ma v oh 2.4??vi oh = ?4 ma note: 1. typical values are at v cc = 5.0 v, ta = +25c and not guaranteed. 2. this characteristics is guaranteed only for l-version. capacitance (ta = +25c, f = 1.0 mhz) parameter symbol min typ max unit test conditions input capacitance* 1 cin ? ? 6 pf vin = 0 v input/output capacitance* 1 c i/o ??8 pfv i/o = 0 v note: 1. this parameter is sampled and not 100% tested.
hm6216255hc series rev. 1, nov. 2001, page 7 of 17 ac characteristics (ta = 0 to +70c, v cc = 5.0 v 10 %, unless otherwise noted.) test conditions ? input pulse levels: 3.0 v/0.0 v ? input rise and fall time: 3 ns ? input and output timing reference levels: 1.5 v ? output load: see figures (including scope and jig) output load (b) (for t clz , t olz , t lblz , t ublz , t chz , t ohz , t lbhz , t ubhz , t whz , and t ow ) dout 255 ? 480 ? 5 v 5 pf 1.5 v 30 pf dout rl=50 ? output load (a) zo=50 ? read cycle hm6216255hc -10 parameter symbol min max unit notes read cycle time t rc 10 ? ns address access time t aa ? 10 ns chip select access time t acs ? 10 ns output enable to output valid t oe ? 5ns byte select to output valid t lb , t ub ? 5ns output hold from address change t oh 3 ? ns chip select to output in low-z t clz 3 ? ns 1 output enable to output in low-z t olz 0 ? ns 1 byte select to output in low-z t lblz , t ublz 0 ? ns 1 chip deselect to output in high-z t chz ? 5ns1 output disable to output in high-z t ohz ? 5ns1 byte deselect to output in high-z t lbhz , t ubhz ? 5ns1
hm6216255hc series rev. 1, nov. 2001, page 8 of 17 write cycle hm6216255hc -10 parameter symbol min max unit notes write cycle time t wc 10 ? ns address valid to end of write t aw 7 ? ns chip select to end of write t cw 7 ? ns 8 write pulse width t wp 7 ? ns 7 byte select to end of write t lbw , t ubw 7 ? ns 9, 10 address setup time t as 0 ? ns 5 write recovery time t wr 0 ? ns 6 data to write time overlap t dw 5 ? ns data hold from write time t dh 0 ? ns write disable to output in low-z t ow 3 ? ns 1 output disable to output in high-z t ohz ? 5ns1 write enable to output in high-z t whz ? 5ns1 notes: 1. transition is measured 200 mv from steady voltage with output load (b). this parameter is sampled and not 100% tested. 2. if the cs or lb or ub low transition occurs simultaneously with the we low transition or after the we transition, output remains a high impedance state. 3. we and/or cs must be high during address transition time. 4. if cs , oe , lb and ub are low during this period, i/o pins are in the output state. then the data input signals of opposite phase to the outputs must not be applied to them. 5. t as is measured from the latest address transition to the latest of cs , we , lb or ub going low. 6. t wr is measured from the earliest of cs , we , lb or ub going high to the first address transition. 7. a write occurs during the overlap of low cs , low we and low lb or low ub . 8. t cw is measured from the later of cs going low to the end of write. 9. t lbw is measured from the later of lb going low to the end of write. 10. t ubw is measured from the later of ub going low to the end of write.
hm6216255hc series rev. 1, nov. 2001, page 9 of 17 timing waveforms read timing waveform (1) ( we = v ih ) t aa t acs t oe t lb t ub t lblz t ublz t olz t clz t oh t chz t ohz t lbhz t rc valid data address dout (upper byte) valid address high impedance valid data dout (lower byte) cs oe lb ub high impedance * 1 * 1 * 1 t ubhz * 1 * 1 * 1 * 1 * 1 * 4 * 4 * 4 * 4
hm6216255hc series rev. 1, nov. 2001, page 10 of 17 read timing waveform (2) ( we = v ih , lb = v il , ub , = v il ) t aa t acs t rc t oe t clz valid data address cs dout (lower/upper byte) valid address high impedance t ohz oe t oh t chz t olz * 1 * 1 * 1 * 1 * 4 * 4
hm6216255hc series rev. 1, nov. 2001, page 11 of 17 write timing waveform (1) ( lb , ub controlled) address * 3 t wc t aw t as t wr t wp t whz t olz t ow t ohz t cw t lbw t ubw t dh t dw t dh t dw valid address valid data valid data * 3 dout (lower byte) dout (upper byte) din (lower byte) din (upper byte) high impedance high impedance
hm6216255hc series rev. 1, nov. 2001, page 12 of 17 write timing waveform (2) ( we controlled) address * 3 t wc t aw t as t wr t wp t whz t olz t ow t ohz t cw t lbw t ubw t dh t dw valid address valid data * 3 , dout (lower/upper byte) din (lower/upper byte) high impedance * 2
hm6216255hc series rev. 1, nov. 2001, page 13 of 17 write timing waveform (3) ( cs controlled) address * 3 t wc t aw t as t wr t wp t whz t olz t ow t ohz t cw t lbw t ubw t dh t dw valid address valid data * 3 , dout (lower/upper byte) din (lower/upper byte) high impedance * 2 * 4
hm6216255hc series rev. 1, nov. 2001, page 14 of 17 low v cc data retention characteristics (ta = 0 to +70c) this characteristics is guaranteed only for l-version. parameter symbol min typ* 1 max unit test conditions v cc for data retention v dr 2.0 ?? vv cc cs v cc ? 0.2 v, (1) 0 v vin 0.2 v or (2) v cc vin v cc ? 0.2 v data retention current i ccdr ? 400 800 a v cc = 3 v v cc cs v cc ? 0.2 v, (1) 0 v vin 0.2 v or (2) v cc vin v cc ? 0.2 v chip deselect to data retention time t cdr 0 ?? ns see retention waveform operation recovery time t r 5 ?? ms note: 1. typical values are at v cc = 3.0 v, ta = +25 c, and not guaranteed. low v cc data retention timing waveform cc v 2.2 v 4.5 v 0 v t cdr t r dr v data retention mode v cc v cc ? 0.2 v
hm6216255hc series rev. 1, nov. 2001, page 15 of 17 package dimensions hm6216255hcjp/hcljp series (cp-44d) 28.33 28.90 max 44 23 122 10.16 0.13 11.18 0.13 3.50 0.26 0.10 *0.43 0.10 9.40 0.25 2.65 0.12 0.74 1.30 max 1.27 0.80 +0.25 ?0.17 0.41 0.08 hitachi code jedec jeita mass (reference value) cp-44d conforms ? 1.8 g *dimension including the plating thickness base material dimension as of july, 2001 unit: mm
hm6216255hc series rev. 1, nov. 2001, page 16 of 17 hm6216255hctt/hc ltt series (ttp-44de) hitachi code jedec jeita mass (reference value) ttp-44de ? ? 0.43 g *dimension including the plating thickness base material dimension 0.13 m 0.10 0.80 44 23 122 18.41 18.81 max *0.27 ?0.07 1.20 max 10.16 0.13 ?0.05 11.76 ?0.20 0? ?5? *0.145 ?0.05 1.005 max 0.50 ?0.10 0.68 0.80 0.25 ?0.05 0.125 ?0.04 as of july, 2001 unit: mm
hm6216255hc series rev. 1, nov. 2001, page 17 of 17 disclaimer 1. hitachi neither warrants nor grants licenses of any rights of hitachi ? s or any third party ? s patent, copyright, trademark, or other intellectual property rights for information contained in this document. hitachi bears no responsibility for problems that may arise with third party ? s rights, including intellectual property rights, in connection with use of the information contained in this document. 2. products and product specifications may be subject to change without notice. confirm that you have received the latest product standards or specifications before final design, purchase or use. 3. hitachi makes every attempt to ensure that its products are of high quality and reliability. however, contact hitachi ? s sales office before using the product in an application that demands especially high quality and reliability or where its failure or malfunction may directly threaten human life or cause risk of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation, traffic, safety equipment or medical equipment for life support. 4. design your application so that the product is used within the ranges guaranteed by hitachi particularly for maximum rating, operating supply voltage range, heat radiation characteristics, installation conditions and other characteristics. hitachi bears no responsibility for failure or damage when used beyond the guaranteed ranges. even within the guaranteed ranges, consider normally foreseeable failure rates or failure modes in semiconductor devices and employ systemic measures such as fail-safes, so that the equipment incorporating hitachi product does not cause bodily injury, fire or other consequential damage due to operation of the hitachi product. 5. this product is not designed to be radiation resistant. 6. no one is permitted to reproduce or duplicate, in any form, the whole or part of this document without written approval from hitachi. 7. contact hitachi ? s sales office for any questions regarding this document or hitachi semiconductor products. sales offices hitachi, ltd. semiconductor & integrated circuits nippon bldg., 2-6-2, ohte-machi, chiyoda-ku, tokyo 100-0004, japan tel: (03) 3270-2111 fax: (03) 3270-5109 copyright ? hitachi, ltd., 2001. all rights reserved. printed in japan. hitachi asia ltd. hitachi tower 16 collyer quay #20-00 singapore 049318 tel : <65>-538-6533/538-8577 fax : <65>-538-6933/538-3877 url : http://semiconductor.hitachi.com.sg url http://www.hitachisemiconductor.com/ hitachi asia ltd. (taipei branch office) 4/f, no. 167, tun hwa north road hung-kuo building taipei (105), taiwan tel : <886>-(2)-2718-3666 fax : <886>-(2)-2718-8180 telex : 23222 has-tp url : http://www.hitachi.com.tw hitachi asia (hong kong) ltd. group iii (electronic components) 7/f., north tower world finance centre, harbour city, canton road tsim sha tsui, kowloon hong kong tel : <852>-(2)-735-9218 fax : <852>-(2)-730-0281 url : http://semiconductor.hitachi.com.hk hitachi europe gmbh electronic components group dornacher stra ? e 3 d-85622 feldkirchen postfach 201, d-85619 feldkirchen germany tel: <49> (89) 9 9180-0 fax: <49> (89) 9 29 30 00 hitachi europe ltd. electronic components group whitebrook park lower cookham road maidenhead berkshire sl6 8ya, united kingdom tel: <44> (1628) 585000 fax: <44> (1628) 585200 hitachi semiconductor (america) inc. 179 east tasman drive san jose,ca 95134 tel: <1> (408) 433-1990 fax: <1>(408) 433-0223 for further information write to: colophon 5.0

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